1. Field of the Invention
The present invention relates to a semiconductor package that has a semiconductor die mounted thereon, and more particularly to a system in package (SIP) in which semiconductor packages are electrically connected to each other.
2. Description of the Related Art
A System In Package (SIP) refers to a package for modulating large scale integrated circuits such as a semiconductor die, which is applied to portable terminals which have difficulty in securing a mounting space. Recently, the SIP has been applied to various fields.
The SIP may be classified into a wire bonding-type SIP, a package on package-type SIP, a via-type SIP, and an embedded-type SIP. In the wire bonding-type SIP, semiconductor dies are laminated and connected to one another by wire-bonding. In the package on package-type SIP, thin packages are laminated. In the via-type SIP, a via hole penetrates through a silicone chip. In the embedded-type SIP, a chip size package of a wafer level is embedded in a resin substrate.
The SIP described above are used for configuring semiconductor dies functioning as memories and semiconductor dies functioning as logic circuits, or used for constituting semiconductor dies functioning as only memories and the combination of memories such as Micon. Recently, the SIP has been used for semiconductor die having various functions.
FIG. 1 is a sectional view showing the configuration of the conventional package-on-package-type SIP. Referring to FIG. 1, the conventional SIP 100 has the first and second semiconductor packages 110 and 120. The first and second semiconductor packages 110 and 120 are laminated in bi-level and connected to each other by means of a plurality of solder balls interposed between the first and second semiconductor packages 110 and 120.
The first and second semiconductor packages 110 and 120 include multilayered printed circuit boards (PCBs) 111 and 121, semiconductor dies 112 and 122 arranged on the PCBs 111 and 121, wires 114 and 124 for electrically connecting the semiconductor dies 112 and 122 to the PCBs 111 and 121, and moldings 113 and 123 formed on the PCBs 111 and 121 to cover the semiconductor dies 112 and 122.
Each of the PCBs 111 and 121 has electric patterns formed on an upper surface thereof, and each of the semiconductor dies 112 and 122 and a part of the electric patterns is electrically connected to each other by wire-bonding. Another part of the electric patterns, which is not connected to the semiconductor dies 112 and 112 by wire-bonding, is electrically connected to a corresponding package 110 or 120 by the solder balls 130.
One disadvantage of the conventional package-on-package-type SIP is that the conventional package-on-package-type SIP requires much space for solder balls, which are inserted between the first and second semiconductor packages, as the present application of the SIP requires much electrical connections between the first and second semiconductor packages. In addition, reliability and mechanical strength of the conventional SIP is low as the conventional SIP has small contact areas compared to the size of each package.